@@ -191,7 +191,9 @@ Simulate the testbench associated with the file tb_firUnit.vhd.
### Test
Run the design flow until the bitstream is produced and transfer it to Moodle in the repository provided for your room. It can then be tested on the available board connected to the *PC prof*. The *Line-in* input can be connected to any analog source via a 3.5mm jack (output from a smartphone or a PC audio card) and the *Line-out* output must be connected to a headset or an audio amplifier.
Run the design flow until the bitstream is produced. It can then be tested on a *Nexys VIDEO* board, available in your classroom. **Ask for one of the boards!**
The *Line-in* input can be connected to any analog source via a 3.5mm jack (output from a smartphone or a PC audio card) and the *Line-out* output must be connected to a headset or an audio amplifier.
The *Nexys VIDEO* board is configured so that the 5 switches `SW7` to `SW2` at the bottom left and the central button `BTNC` at the bottom right are used.
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@@ -224,7 +226,7 @@ Your project must now contain the file `operativeUnit.vhd` instead of the file `
### Test
Run the design flow until the bitstream is produced and transfer it to Moodle in the repository provided for your room. It can then be tested on the available board connected to the PC prof.
Run the design flow until the bitstream is produced and transfer it to a *Nexys VIDEO* board.
!!! question "Question filter 6 (answer to be completed in the file `docs/compte-rendu.md`)"
Do you validate the design of the operative unit? If not, what is the problem? How can you fix it?
