A gitlab repository `tp-synthe-etudiant` is available in your gitlab space on [https://gitlab-df.imt-atlantique.fr](https://gitlab-df.imt-atlantique.fr), in the group corresponding to the course followed.
To manipulate it (`clone`, `add`, `commit`, `push`, `pull`), please refer to the page [Git and Gitlab ](../gitlab.md).
If no repository creation is planned for your course, or if you want to do this lab freely. The reference repository is here: [https://gitlab.imt-atlantique.fr/tp-vhdl/tp-synthe-etudiant](https://gitlab.imt-atlantique.fr/tp-vhdl/tp-filtre-etudiant)
## Objective
This lab offers a brief introduction to the design of digital integrated circuits with simple blocks to analyse and then then to interconnect.
Once wired, all the blocks process samples so that tones can be generated with orders coming from a USB keyboard.
Starting from blocks described in VHDL (a language dedicated to electronics), you will have to
1. analyse time diagrams of blocks to deduce their functions,
2. wire all the blocks together,
3. perform its synthesis,
3. test the resulting circuit on a reconfigurable Field-Programmable Gate Array (FPGA) circuit by playing some tones.
!!! note
A VHDL code will be partially proposed to you, you will have to complete it, based on the preparatory work requested.
!!! info
For your information, know that FPGAs have held an essential place in high-end audiophile systems (such as those from PSaudio) for several years and are beginning to break into "consumer" products with high-resolution formats that FPGAs can fully exploit (as in the Chord Mojo for audiophile players).
## Synthesizing tones
To synthesize tones, you can use visit this webpage:
https://www.szynalski.com/tone-generator/
You can see that tones are associated to oscillation frequencies of different waveforms: sine, square, triangle or saw-tooth.
#### Work in the classroom
You will use the Xilinx Vivado software to describe and synthesize your circuit based on the files available on the git repository.
During this lab sessions, ***you will complete the provided code of
The circuit to be configured is a Xilinx Artix 7 FPGA which is integrated on the Digilent Nexys Video board shown below and including, in addition to the FPGA, many peripherals.
This documentation is *useful* to understand the use of the peripherals.
### Retrieving the gitlab project on [https://gitlab-df.imt-atlantique.fr](https://gitlab-df.imt-atlantique.fr)
A git repository has been created for each student on the school's DFVS gitlab instance [https://gitlab-df.imt-atlantique.fr](https://gitlab-df.imt-atlantique.fr). It contains the VHDL sources necessary for the project, scripts to manage the Vivado project, and a `compte-rendu.md` file to answer the questions. If you work in pairs, choose one of the two, and add your colleague as an `owner` on the project in gitlab.
First, open a terminal: ++ctrl+alt+t++
- Create a directory for the UE Électronique and move into it:
!!! warning
Remember to adapt the path of the command below to your own needs
```bash
mkdir-p ~/path/wish/tp-vhdl-mee/UE-name/
cd!$
```
- Clone the git repository locally
!!! warning
Remember to adapt the link of the command below according to the repository on gitlab
The `git clone` command allows you to retrieve the entire `git` repository with its history of modifications.
You can easily see that this command has allowed you to download with the `ls -alsh` command in the `tp-filtre-etudiant-$USER` directory.
### Creating a Vivado project
!!! warning
Never put **spaces**, **accents** or **special characters** in file or directory names! This is true in general, on Windows as well as on Linux. And it crashes Vivado in our case here.
Return to the user's home directory and launch Vivado
{%
include-markdown "vhdl/launch-vivado.md"
%}
A TCL script is provided to automate the project creation. To use it, you need to:
- go to the Tcl console of Vivado, at the bottom of the window.
- go to the `proj` directory with the `cd` command: `cd tp-synthe-etudiant-$USER/proj` (here you have to manually replace `$USER` with your login)
- type the command `source ./create_project.tcl`
!!! warning
There should be no accents, spaces or special characters in the path and file name
!!! note
shell commands `cd`, `ls`, `pwd` are usable in this console
