diff --git a/proj/create_project.tcl b/proj/create_project.tcl index ee90c0a24e478c716c52035df5091d5fb91818d1..0d3a6ea3ad006ccd56fd0580492ea90ba84711e5 100644 --- a/proj/create_project.tcl +++ b/proj/create_project.tcl @@ -41,9 +41,13 @@ if {[string equal [get_filesets -quiet sources_1] ""]} { create_fileset -srcset sources_1 } -# Create 'constrs_1' fileset (if not found) -if {[string equal [get_filesets -quiet constrs_1] ""]} { - create_fileset -constrset constrs_1 +# Create 'constrs_Nexys4' fileset (if not found) +if {[string equal [get_filesets -quiet constrs_Nexys4] ""]} { + create_fileset -constrset constrs_Nexys4 +} + +if {[string equal [get_filesets -quiet constrs_Nexys4DDR_A7] ""]} { + create_fileset -constrset constrs_Nexys4DDR_A7 } # Set IP repository paths @@ -57,14 +61,15 @@ add_files -quiet $src_dir/hdl add_files -quiet [glob -nocomplain ../src/ip/*/*.xci] # Add constraints -add_files -fileset constrs_1 -quiet $src_dir/constraints +add_files -fileset constrs_Nexys4 -quiet $src_dir/constraints/Nexys4_Sobel.xdc +add_files -fileset constrs_Nexys4DDR_A7 -quiet $src_dir/constraints/Nexys4VideoA7_Sobel.xdc # Refresh IP Repositories #update_ip_catalog # Create 'synth_1' run (if not found) if {[string equal [get_runs -quiet synth_1] ""]} { - create_run -name synth_1 -part $part_num -flow {Vivado Synthesis 2014} -strategy "Flow_PerfOptimized_High" -constrset constrs_1 + create_run -name synth_1 -part $part_num -flow {Vivado Synthesis 2014} -strategy "Flow_PerfOptimized_High" -constrset constrs_Nexys4 } else { set_property strategy "Flow_PerfOptimized_High" [get_runs synth_1] set_property flow "Vivado Synthesis 2014" [get_runs synth_1] @@ -83,7 +88,7 @@ current_run -synthesis [get_runs synth_1] # Create 'impl_1' run (if not found) if {[string equal [get_runs -quiet impl_1] ""]} { - create_run -name impl_1 -part $part_num -flow {Vivado Implementation 2014} -strategy "Vivado Implementation Defaults" -constrset constrs_1 -parent_run synth_1 + create_run -name impl_1 -part $part_num -flow {Vivado Implementation 2014} -strategy "Vivado Implementation Defaults" -constrset constrs_Nexys4 -parent_run synth_1 } else { set_property strategy "Vivado Implementation Defaults" [get_runs impl_1] set_property flow "Vivado Implementation 2014" [get_runs impl_1] @@ -105,6 +110,11 @@ set_property used_in_synthesis false [get_files ../src/hdl/tb_regUnit.vhd] set_property used_in_synthesis false [get_files ../src/hdl/tb_sobelProc.vhd] set_property used_in_synthesis false [get_files ../src/hdl/tb_sobelSys.vhd] +set_property constrset constrs_Nexys4 [get_runs synth_1] +set_property constrset constrs_Nexys4 [get_runs impl_1] + +delete_fileset [ get_filesets constrs_1 ] + #puts "INFO: Project created:$proj_name" # Comment the following section, if there is no block design diff --git a/src/hdl/sobelSys.vhd b/src/hdl/sobelSys.vhd index 6cfad747fc1d6d4164952df59d1d9f9e7064e8e9..1f1e3b26f4bb645511dfc724de429d00865069e4 100644 --- a/src/hdl/sobelSys.vhd +++ b/src/hdl/sobelSys.vhd @@ -181,7 +181,7 @@ begin G_MemoryWidth => 8, G_MemoryDepth => 10000, G_AddressWidth => 14, - G_InitFileName => "dancing_spider.txt" + G_InitFileName => "../data/dancing_spider.txt" ) port map ( I_clk => S_clk_25MHz,